1. Technical Field
The present invention relates to nonvolatile memory devices, and more particularly, to phase change memory devices.
2. Related Art
In general, semiconductor memory devices are classified into volatile memory devices and nonvolatile memory devices. The volatile memory devices lose data stored therein when the power supply is cut off. The nonvolatile memory devices maintain data stored therein even though power supply is cut off. Nonvolatile memory devices may include various types of the memory cells.
Nonvolatile memory devices include flash memory devices, ferroelectric RAM (FRAM), which use ferroelectric capacitors, magnetic RAM (MRAM) which may use a tunneling magneto-resistive (TMR) layer, and phase change memory devices, which may use chalcogenide alloys and the like, depending on the structure of memory cells. In particular, phase change memory devices are nonvolatile memory devices that use phase change, based on temperature change, that is, resistance change. For this reason, phase change memory devices are also referred to as a variable-resistance memory devices.
The memory cells of a phase change memory device are formed of a phase change material, for example, a chalcogenide alloy, which is typically a Ge—Sb—Te alloy (hereafter, referred to as ‘GST material’). The GST material has an amorphous state exhibiting a relatively high resistivity and a crystalline state exhibiting a relatively low resistivity. The memory cell of the phase change memory device may store “1” data corresponding to the amorphous state and “0” data corresponding to the crystalline state. By controlling heat applied to the GST material, data corresponding to the amorphous state or the crystalline state is programmed into the memory cell of the phase change memory device. For example, both the magnitude and duration of a current for heating the GST material may be adjusted to control the amorphous state or crystalline state of the GST material.
The program operation of the phase change memory device includes a program operation for applying a program current to a selected memory cell and a verify read operation for verifying the state of the memory cell. Before the program current is applied to the selected memory cell, a selected word line should be maintained at a ground voltage level. Furthermore, before the state of the memory cell to which the program current is applied is verified, the selected word line should be maintained at the ground voltage level. When the selected word line is not maintained at the ground voltage level, the program current may not be normally passed, or a cell current for sensing data may not be normally passed.
The program operation will be described with reference to FIG. 1, which is a diagram that schematically illustrates a program operation of a conventional phase change memory device. Specifically, FIG. 1 illustrates the relationship between a cell current, Icell, that is passed through a selected memory cell, and a voltage Vwl of a selected word line when the cell current Icell is passed.
During the program operation of the phase change memory device, a program operation for applying a program current to a memory cell and a verify read operation for verifying the state of the memory cell may be repeated until the selected memory cell is programmed. When the cell current passed through the selected memory cell is not sufficiently discharged to the selected word line during the program operation and the verify read operation, the selected word line has a predetermined voltage level. That is, when an interval between the program operation and the verify read operation is so small as in periods A, B, C, or D of FIG. 1 such that the next operation is performed in a state where the selected word line is not sufficiently discharged, the selected word line has a predetermined voltage level instead of the ground voltage level.
When the selected word line has a predetermined voltage level instead of the ground voltage level, the program current is not sufficiently passed, and the selected memory cell may not be programmed to a desired state. Furthermore, when the selected word line has a predetermined voltage instead of the ground voltage level, a sensing current is not sufficiently passed, and the state of the selected memory cell may not be normally sensed. That is, when the cell current passed through the selected memory cell is not sufficiently discharged to the selected word line, an operation error may occur in the phase change memory device.